Jason D Bakos
Specialization and Heterogeneity: The Last Ride on Moore's Law?
Dr.Jason D. Bakos, University of South Carolina
February 1st, 2019
The past few years have brought many exciting leaps in computational capabilities, such as practical autonomous car and drone technologies, speech recognition integrated into devices ranging from phones to television remote controls, 4K video recording and computational photography in smart phones, real-time facial tracking for animated emojis, and reliably-accurate facial recognition technology. These capabilities have come at a time when modern CPUs are confined behind the memory and power walls, having grown only marginally faster than CPUs of 10 years ago. Instead, the performance demands of emerging applications are provided by the rapid rise in heterogeneous systems of specialized processors, including graphical-, vision-, visual-, and tensor/neural-processors. This new paradigm has unleashed a generation of computer architects from the constraints of general-purpose architectures and compilers and—together with emerging memory technologies—has ushered in a new golden age in computer architecture research.
In this talk I will recount experiences and general observations from 15 years of research in domain-specific computer architecture, and then describe two of our current projects in detail. The first is NAPOLY, our "Nondeterministic Automata Processor OverLaY". NAPOLY is a runtime-reconfigurable overlay designed to recognize arbitrary pattern sets. As an overlay architecture, NAPOLY decouples the low-level details of the hardware design from the intermediate representation of the application interface, which in this case are Nondeterministic Finite Automata (NFA) graphs. NAPOLY harnesses the on-chip memory bandwidth available on Field Programmable Gate Arrays (FPGAs) to accelerate any application that is reducible to pattern matching operations. The second project, in collaboration with Texas Instruments, is developing more efficient methods to allocate OpenVX dataflow graphs onto the TI TDA2x Advanced Driver Assistance Systems (ADAS) System-on-Chip, which uses a vision architecture similar to Qualcomm Hexagon, Google Visual Core, and Nvidia Xavier. This project relies on training performance models of the SoC's memory system to optimize node chaining and tile size. Both projects share a common theme of optimizing graph-based applications onto microarchitectures having custom memory structures.
Jason D. Bakos is a professor of Computer Science and Engineering at the University of South Carolina. He received a B.S. in Computer Science from Youngstown State University in 1999 and a Ph.D. in Computer Science from the University of Pittsburgh in 2005. Dr. Bakos leads the Heterogeneous and Reconfigurable Computing (HeRC) Group, where his research focuses on improving performance and efficiency of computing systems through the application of emerging processing technologies such as domain-specific, reconfigurable, massively parallel, and processor-in-memory architectures. Dr. Bakos holds two U.S. patents and has published approximately 50 refereed publications in computer architecture and high-performance computing, as well as a textbook on programming for embedded systems. He received the U.S. National Science Foundation (NSF) CAREER award in 2009 and won DAC design contests in 2002 and 2004. His work is currently funded by NSF, ONR, and Texas Instruments Corporation, is serving as associate editor for ACM Transactions on Reconfigurable Technology and Systems (TRETS), and is a member of the IEEE, Computer Society, and ACM.